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HBTI, Harcourt Butler Technological Institute,UPTU ... Work is worship . Rajani Bisht HOD DEPARTMENT OF ELECTRONICS ENGG. HBTI Kanpur
Rajani Bisht, S Sarkar, R P Agarwal, “VLSI interconnect delay minimization using CMOS inverters” Proceedings of All India Seminar on ...
4 : 4984: Aditya Hooda: 173.5: 5 : 4610: Dilip Kumar Singh: 159: 6 : 4710: Shipra Singh: 157.5: 7: 4641: Vivek Rai: 157: 8: 4783: Rajani Bisht: 156: 9: 4545: Abhisekh Prakash: 145: 10
Acknowledgement One of the authors of the paper (Rajani Bisht) has taken support from the AICTE funded TAPTECH Project "VLSI DESIGN" for this work.
Rajani Bisht says: March 11 this link not open plz tell how to apply and give details ?????
HBTI, Harcourt Butler Technological Institute,UPTU ... Work is worship . Rajani Bisht HOD DEPARTMENT OF ELECTRONICS ENGG. HBTI Kanpur
Rajani Bisht, S Sarkar, R P Agarwal, VLSI interconnect delay minimization using CMOS inverters Proceedings of All India ...
4 : 4984: Aditya Hooda: 173.5: 5 : 4610: Dilip Kumar Singh: 159: 6 : 4710: Shipra Singh: 157.5: 7: 4641: Vivek Rai: 157: 8: 4783: Rajani Bisht: 156: 9: 4545: Abhisekh Prakash: 145: 10
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Rajani Bisht, S Sarkar, R P Agarwal, “VLSI interconnect delay minimization using CMOS ... Rajani Bisht, B. Mazhari, “Impact of Kink Effect on Performance of ...
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4641, Vivek Rai, 157, 8. 4783, Rajani Bisht, 156, 9. 4545, Abhisekh Prakash, 145, 10 ... 4783, Rajani Bisht, 177, 8. 4478, Sonu Kumar, 167.5, 9 ...
Rajani Bisht. Divyakala M. Aruna Devi K. Raji M Ramakrishnan. Kasturirangan P. Koushik S. Nikhilrajavarman A. Pradheep A R. Sathish Kumar S ...
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