Vishwajeet B

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Vishwajeet Bhalke
Vishwajeet Bhalke

Locality: Pune Area, India
Summary: ASIC Design Verification Engineer
Current: ASIC Design Verification Engineer at eInfochips
Past: Team Lead at Vayavyalabs pvt ltd Design Verification Engineer at Saankhya Labs Pvt Ltd
Education:  Kendriya Vidyalaya  (1991-2001) 

Industry: Semiconductors
Experience: eInfochips (Privately Held; Semiconductors industry): ASIC Design Verification Engineer,  (February 2010-Present) 
Vayavyalabs pvt ltd (Information Technology and Services industry): Team Lead,  (April 2009-October 2009) Designing OVM (Open Verification Methodology) compatible Verification Environment (Layered Test Bench with random constraint stimulus)...
Interests: career opportunities, job inquiries, expertise requests, business deals, reference requests, getting back in touch

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