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Rajender Jindal

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Rajender Jindal
Locality:
Noida Area, India
Summary:
Experience in rtl design verification , validation and verification bfm development using vera, verilog, system verilog.
Experience:
Mentor Graphics (Public Company; MENT; Computer Software industry): lead member technical staff.,  (December 2007-Present) working as senior member technical staff in vip group.
synopsys (Public Company; 1001-5000 employees; SNPS; Computer Software industry): contractor...