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"Power-Efficient Cache Design Using Dual-Edge Clocking Scheme in Sun Open SPAR C T1 and Alpha AXP Processors", Rajesh Kannan Megalingam, and Arunkumar M, Arjun Ashok V, Nived ...
"Highly Power Efficient, Uncompromised Performance Cache Design Using Dual-Edged Clock ", Rajesh Kannan M, Nived Krishnan, Arjun Ashok V and Arunkumar M, 2nd IEEE ...
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